1. Field of the Invention
This invention relates to the process for forming local interconnects and to interconnects produced by the process. More particularly, it relates to such interconnects which serve as a diffusion barrier.
2. Description of Related Art
A current method of fabricating local interconnection structures between two semiconductor regions uses a conductive material composed of silicide material that is also employed as a diffusion barrier.
U.S. Pat. No. 5,266,156 of Nasr for "Method of Forming a Local Interconnect and a High Resistor Polysilicon Load by Reacting Cobalt with Polysilicon" states at Col. 1, line 51 as follows:
"Another technique has been suggested by Deveraux et al. in, `A New Device Interconnect Scheme For Sub-Micron VLSI,` 84 IEDM pages 118-121. In this technique, a thin layer of refractory metal and amorphous silicon are deposited sequentially and in the the same pumpdown. The amorphous silicon is patterned and then the wafer is annealed whereby the refractory metal reacts with the amorphous silicon as well as single crystal silicon and polysilicon to form a silicide. The unreacted metal is then removed by wet etching.
"This technique suffers from limitations such as oxidation of the titanium film during the silicon dry etch which contains oxygen species. Additionally, the photoresist stripping agent showed a tendency for attacking the refractory metal which in this case was titanium."
Nasr shows forming a CoSi.sub.2 layer over a source/drain region and another CoSi.sub.2 layer over a polysilicon gate which is supported on a FOX structure on the semiconductor substrate. The CoSi.sub.2 layer is formed by sputtering cobalt onto the device followed by a rapid thermal anneal which consumes some of the silicon in the source/drain region and the polysilicon gate. The remaining cobalt which does not form CoSi.sub.2 is etched away. A second higher temperature heat treatment follows to convert the CoSi.sub.2 to a low resistivity material. Then a thin layer of LPCVD polysilicon or amorphous silicon film is applied to the device, which is patterned with a mask and etched into the shape of a desired interconnect between the two CoSi.sub.2 structures. Then a second layer of cobalt is applied and subjected to heating to form more CoSi.sub.2 to form the local interconnect. The remainder of the cobalt is removed by etching.
U.S. Pat. No. 5,173,450 of Wei for "Titanium Silicide Local Interconnect Process" and U.S. Pat. No. 5,204,279 of Chan et al for "Method of Making SRAM Cell and Structure with Polycrystalline P-Channel Load Devices" show a local interconnect structure and process for forming such a structure.
Sze, VLSI Technology, McGraw-Hill Book Company, (Second Edition 1988), p. 381 states "Refractory silicides, formed on top of polysilicon, have provided the highest compatibility. Disilicides of molybdenum (MoSi.sub.2),.sup.10 tantalum (TaSi.sub.2),.sup.11 and tungsten (WSi.sub.2).sup.12 have been developed and have found their way into production of microprocessors and random-access memories. More recently, TiSi.sub.2.sup.13,14 and CoSi.sub.2.sup.15 have been suggested to replace MoSi.sub.2, TaSi.sub.2, and WSi.sub.2. Aluminum and refractory metals tungsten and molybdenum are also being considered for the gate metal..sup.16-18 "
Uyemura "Fundamentals of MOS Digital Integrated Circuits" p. 249 (1988) "Metal layers are used to provide low-resistance interconnects . . . .
"Refractory (high temperature) metals are finding increasing use in VLSI structures. The main advantage of using a refractory metal is that low-resistance patterned interconnect levels can be formed at any time in the chip process flow. The high melting point associated with these metals keeps the pattern intact even if the wafer is subjected to additional heat treatments. (Al has a low melting point--600[.degree. C.]--and can be used only after all the high-temperature cycles are completed.) This property allows for multiple-level interconnects to be created, which aids in the layout of complex chips. Refractory metals of current interest include titanium (Ti), platinum (Pt), molybdenum (Mo), and tungsten (W). These may be evaporated using electron-beam heating or may be sputtered onto the wafer. In sputtering, an inert gas such as argon (Ar) is ionized and used to bombard an electrode that is coated with the desired substance. The collisions knock the atoms off the electrode, creating a particle flux directed towards the wafer."